Publikationen

In this paper, we propose an open source design flow for the low cost FPGAs from the company Gowin. Open source design tools are opening the door for custom extensions and modification in the design flow. The proposed design flow which supports almost all Gowin FPGA resources, is based on well-known open source tools, like Yosys and nextpnr, as well as on our proposed open source bitstream generator. The necessary architectural details of the FPGA family are gathered by input fuzzing and comparisons with the vendor tool flow. Experimental results show an almost similar performance as the vendor tools.

Switched reluctance motors (SRM) are an inherent part in robotics and automation systems where energy and cost efficiency is required. This motor type has no windings and permanent magnets on the rotor which results in a simple and robust structure. However, SRMs require a complex electronic control system to generate a specified number of voltage pulses for each motor phase. This paper presents the signal generation of multiple phases using only one current sensor in an asymmetric half bridge (AHB). In addition to maintain the predetermined phase voltages, sufficient current measurement windows and a minimal current ripple for the individual phases are further optimization criteria for signal generation. The generation of a state vector which controls the individual semiconductor for each motor phase to achieve a required phase voltage and simultaneously fulfill the multi-objective optimization criteria is challenging. Due to the vast number of possible solutions, a genetic algorithm (GA) was used to find state combinations that are suitable for the formulated optimization criteria. The results were discussed and recommendations about the genotype representation and the used genetic operators were given. Interested readers will find detailed information about the software technical implementation using the Global Optimization Toolbox from MATLAB.

The problem of avoiding overshoot in tracking control problems has an extensive history, but only a few works have offered methods that are applicable to a nonlinear plant. The recent paper (Schmid, 2019) adapted some methods from the linear control systems literature to offer state feedback laws to deliver a nonovershooting response in all outputs of a multi-input multi-output feedback linearisable plant. A double-buck converter consists of cascaded buck converters connected to a single voltage supply. Taking the system outputs as the voltages across the two load resistors, we use dynamic averaging to obtain a nonlinear state model for the converter. We introduce suitable coordinates to show it has a well-defined vector relative degree and show the system is feedback linearisable. The methods of (Schmid, 2019) are then employed to obtain a state feedback law that ensures both outputs track arbitrary time-varying reference trajectories without overshoot.

We consider sliding-mode control systems subject to unmatched disturbances. Classical first-order sliding-mode techniques are capable to compensate unmatched disturbances if differentiations of the output of sufficiently high order are included in the sliding variable. For such disturbances it is commonly assumed that they do not affect the relative degree of the system. In this contribution we consider disturbances that alter the relative degree of the process and study their impact on the closed-loop control system with the classical first-order sliding-mode design. We analyse the reaching and sliding phase of the resulting closed-loop system. We show that uniqueness of the solution may be lost and derive conditions for such behaviour. We present conditions for the stability of the sliding-mode dynamics and analyse the disturbance rejection properties. A simulation case study of a two-mass spring-damper system illustrates the various closed-loop behaviours.

In this work we extend the concept of fractional-order memory reset control. A fractional-order controller is applied to an integer-order plant and its memory is deleted periodically. As an extension, the controller state itself is reset, based on the reference and the error signal. The closed loop can be represented by a fractional-order hybrid system with induced discrete dynamics. These are used to tune the reset law and to prove exponential stability. By means of the extended reset strategy the reset intervals can be reduced, such that less memory is needed to implement the fractional-order operators. Furthermore, a new approach for the real-time implementation of memory reset controllers is presented that achieves a decrease of the numerical error. All results are validated by simulations and experimentally.